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authorValentin Popov <valentin@popov.link>2024-01-08 00:21:28 +0300
committerValentin Popov <valentin@popov.link>2024-01-08 00:21:28 +0300
commit1b6a04ca5504955c571d1c97504fb45ea0befee4 (patch)
tree7579f518b23313e8a9748a88ab6173d5e030b227 /vendor/rustix/src/backend/linux_raw/arch/aarch64.rs
parent5ecd8cf2cba827454317368b68571df0d13d7842 (diff)
downloadfparkan-1b6a04ca5504955c571d1c97504fb45ea0befee4.tar.xz
fparkan-1b6a04ca5504955c571d1c97504fb45ea0befee4.zip
Initial vendor packages
Signed-off-by: Valentin Popov <valentin@popov.link>
Diffstat (limited to 'vendor/rustix/src/backend/linux_raw/arch/aarch64.rs')
-rw-r--r--vendor/rustix/src/backend/linux_raw/arch/aarch64.rs268
1 files changed, 268 insertions, 0 deletions
diff --git a/vendor/rustix/src/backend/linux_raw/arch/aarch64.rs b/vendor/rustix/src/backend/linux_raw/arch/aarch64.rs
new file mode 100644
index 0000000..d4cf247
--- /dev/null
+++ b/vendor/rustix/src/backend/linux_raw/arch/aarch64.rs
@@ -0,0 +1,268 @@
+//! aarch64 Linux system calls.
+
+use crate::backend::reg::{
+ ArgReg, FromAsm, RetReg, SyscallNumber, ToAsm, A0, A1, A2, A3, A4, A5, R0,
+};
+use core::arch::asm;
+
+#[cfg(target_pointer_width = "32")]
+compile_error!("arm64-ilp32 is not supported yet");
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall0_readonly(nr: SyscallNumber<'_>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ lateout("x0") r0,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_noreturn(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> ! {
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ in("x0") a0.to_asm(),
+ options(nostack, noreturn)
+ )
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ in("x3") a3.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ in("x3") a3.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ in("x3") a3.to_asm(),
+ in("x4") a4.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ in("x3") a3.to_asm(),
+ in("x4") a4.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ in("x3") a3.to_asm(),
+ in("x4") a4.to_asm(),
+ in("x5") a5.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ in("x3") a3.to_asm(),
+ in("x4") a4.to_asm(),
+ in("x5") a5.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}