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-rw-r--r--vendor/rustix/src/backend/linux_raw/arch/aarch64.rs268
-rw-r--r--vendor/rustix/src/backend/linux_raw/arch/arm.rs265
-rw-r--r--vendor/rustix/src/backend/linux_raw/arch/mips.rs543
-rw-r--r--vendor/rustix/src/backend/linux_raw/arch/mips32r6.rs543
-rw-r--r--vendor/rustix/src/backend/linux_raw/arch/mips64.rs466
-rw-r--r--vendor/rustix/src/backend/linux_raw/arch/mips64r6.rs470
-rw-r--r--vendor/rustix/src/backend/linux_raw/arch/mod.rs317
-rw-r--r--vendor/rustix/src/backend/linux_raw/arch/powerpc64.rs413
-rw-r--r--vendor/rustix/src/backend/linux_raw/arch/riscv64.rs265
-rw-r--r--vendor/rustix/src/backend/linux_raw/arch/thumb.rs322
-rw-r--r--vendor/rustix/src/backend/linux_raw/arch/x86.rs489
-rw-r--r--vendor/rustix/src/backend/linux_raw/arch/x86_64.rs293
12 files changed, 4654 insertions, 0 deletions
diff --git a/vendor/rustix/src/backend/linux_raw/arch/aarch64.rs b/vendor/rustix/src/backend/linux_raw/arch/aarch64.rs
new file mode 100644
index 0000000..d4cf247
--- /dev/null
+++ b/vendor/rustix/src/backend/linux_raw/arch/aarch64.rs
@@ -0,0 +1,268 @@
+//! aarch64 Linux system calls.
+
+use crate::backend::reg::{
+ ArgReg, FromAsm, RetReg, SyscallNumber, ToAsm, A0, A1, A2, A3, A4, A5, R0,
+};
+use core::arch::asm;
+
+#[cfg(target_pointer_width = "32")]
+compile_error!("arm64-ilp32 is not supported yet");
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall0_readonly(nr: SyscallNumber<'_>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ lateout("x0") r0,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_noreturn(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> ! {
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ in("x0") a0.to_asm(),
+ options(nostack, noreturn)
+ )
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ in("x3") a3.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ in("x3") a3.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ in("x3") a3.to_asm(),
+ in("x4") a4.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ in("x3") a3.to_asm(),
+ in("x4") a4.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ in("x3") a3.to_asm(),
+ in("x4") a4.to_asm(),
+ in("x5") a5.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("x8") nr.to_asm(),
+ inlateout("x0") a0.to_asm() => r0,
+ in("x1") a1.to_asm(),
+ in("x2") a2.to_asm(),
+ in("x3") a3.to_asm(),
+ in("x4") a4.to_asm(),
+ in("x5") a5.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
diff --git a/vendor/rustix/src/backend/linux_raw/arch/arm.rs b/vendor/rustix/src/backend/linux_raw/arch/arm.rs
new file mode 100644
index 0000000..77c1f82
--- /dev/null
+++ b/vendor/rustix/src/backend/linux_raw/arch/arm.rs
@@ -0,0 +1,265 @@
+//! arm Linux system calls.
+
+use crate::backend::reg::{
+ ArgReg, FromAsm, RetReg, SyscallNumber, ToAsm, A0, A1, A2, A3, A4, A5, R0,
+};
+use core::arch::asm;
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall0_readonly(nr: SyscallNumber<'_>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("r7") nr.to_asm(),
+ lateout("r0") r0,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("r7") nr.to_asm(),
+ inlateout("r0") a0.to_asm() => r0,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("r7") nr.to_asm(),
+ inlateout("r0") a0.to_asm() => r0,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_noreturn(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> ! {
+ asm!(
+ "svc 0",
+ in("r7") nr.to_asm(),
+ in("r0") a0.to_asm(),
+ options(nostack, noreturn)
+ )
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("r7") nr.to_asm(),
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("r7") nr.to_asm(),
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("r7") nr.to_asm(),
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("r7") nr.to_asm(),
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("r7") nr.to_asm(),
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ in("r3") a3.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("r7") nr.to_asm(),
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ in("r3") a3.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("r7") nr.to_asm(),
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ in("r3") a3.to_asm(),
+ in("r4") a4.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("r7") nr.to_asm(),
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ in("r3") a3.to_asm(),
+ in("r4") a4.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("r7") nr.to_asm(),
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ in("r3") a3.to_asm(),
+ in("r4") a4.to_asm(),
+ in("r5") a5.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "svc 0",
+ in("r7") nr.to_asm(),
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ in("r3") a3.to_asm(),
+ in("r4") a4.to_asm(),
+ in("r5") a5.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
diff --git a/vendor/rustix/src/backend/linux_raw/arch/mips.rs b/vendor/rustix/src/backend/linux_raw/arch/mips.rs
new file mode 100644
index 0000000..37932e0
--- /dev/null
+++ b/vendor/rustix/src/backend/linux_raw/arch/mips.rs
@@ -0,0 +1,543 @@
+//! mipsel Linux system calls.
+//!
+//! On mipsel, Linux indicates success or failure using `$a3` rather
+//! than by returning a negative error code as most other architectures do.
+//!
+//! Mips-family platforms have a special calling convention for `__NR_pipe`,
+//! however we use `__NR_pipe2` instead to avoid having to implement it.
+
+use crate::backend::reg::{
+ ArgReg, FromAsm, RetReg, SyscallNumber, ToAsm, A0, A1, A2, A3, A4, A5, A6, R0,
+};
+use core::arch::asm;
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall0_readonly(nr: SyscallNumber) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_noreturn(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> ! {
+ asm!(
+ "syscall",
+ in("$2" /*$v0*/) nr.to_asm(),
+ in("$4" /*$a0*/) a0.to_asm(),
+ options(nostack, noreturn)
+ )
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ ".set noat",
+ "subu $sp, 32",
+ "sw {}, 16($sp)",
+ "syscall",
+ "addu $sp, 32",
+ ".set at",
+ in(reg) a4.to_asm(),
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ ".set noat",
+ "subu $sp, 32",
+ "sw {}, 16($sp)",
+ "syscall",
+ "addu $sp, 32",
+ ".set at",
+ in(reg) a4.to_asm(),
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ ".set noat",
+ "subu $sp, 32",
+ "sw {}, 16($sp)",
+ "sw {}, 20($sp)",
+ "syscall",
+ "addu $sp, 32",
+ ".set at",
+ in(reg) a4.to_asm(),
+ in(reg) a5.to_asm(),
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ ".set noat",
+ "subu $sp, 32",
+ "sw {}, 16($sp)",
+ "sw {}, 20($sp)",
+ "syscall",
+ "addu $sp, 32",
+ ".set at",
+ in(reg) a4.to_asm(),
+ in(reg) a5.to_asm(),
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall7_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+ a6: ArgReg<'_, A6>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ ".set noat",
+ "subu $sp, 32",
+ "sw {}, 16($sp)",
+ "sw {}, 20($sp)",
+ "sw {}, 24($sp)",
+ "syscall",
+ "addu $sp, 32",
+ ".set at",
+ in(reg) a4.to_asm(),
+ in(reg) a5.to_asm(),
+ in(reg) a6.to_asm(),
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
diff --git a/vendor/rustix/src/backend/linux_raw/arch/mips32r6.rs b/vendor/rustix/src/backend/linux_raw/arch/mips32r6.rs
new file mode 100644
index 0000000..c2d9244
--- /dev/null
+++ b/vendor/rustix/src/backend/linux_raw/arch/mips32r6.rs
@@ -0,0 +1,543 @@
+//! mipsisa32r6el Linux system calls.
+//!
+//! On mipsisa32r6el, Linux indicates success or failure using `$a3` rather
+//! than by returning a negative error code as most other architectures do.
+//!
+//! Mips-family platforms have a special calling convention for `__NR_pipe`,
+//! however we use `__NR_pipe2` instead to avoid having to implement it.
+
+use crate::backend::reg::{
+ ArgReg, FromAsm, RetReg, SyscallNumber, ToAsm, A0, A1, A2, A3, A4, A5, A6, R0,
+};
+use core::arch::asm;
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall0_readonly(nr: SyscallNumber) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_noreturn(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> ! {
+ asm!(
+ "syscall",
+ in("$2" /*$v0*/) nr.to_asm(),
+ in("$4" /*$a0*/) a0.to_asm(),
+ options(nostack, noreturn)
+ )
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ ".set noat",
+ "subu $sp, 32",
+ "sw {}, 16($sp)",
+ "syscall",
+ "addu $sp, 32",
+ ".set at",
+ in(reg) a4.to_asm(),
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ ".set noat",
+ "subu $sp, 32",
+ "sw {}, 16($sp)",
+ "syscall",
+ "addu $sp, 32",
+ ".set at",
+ in(reg) a4.to_asm(),
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ ".set noat",
+ "subu $sp, 32",
+ "sw {}, 16($sp)",
+ "sw {}, 20($sp)",
+ "syscall",
+ "addu $sp, 32",
+ ".set at",
+ in(reg) a4.to_asm(),
+ in(reg) a5.to_asm(),
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ ".set noat",
+ "subu $sp, 32",
+ "sw {}, 16($sp)",
+ "sw {}, 20($sp)",
+ "syscall",
+ "addu $sp, 32",
+ ".set at",
+ in(reg) a4.to_asm(),
+ in(reg) a5.to_asm(),
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall7_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+ a6: ArgReg<'_, A6>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ ".set noat",
+ "subu $sp, 32",
+ "sw {}, 16($sp)",
+ "sw {}, 20($sp)",
+ "sw {}, 24($sp)",
+ "syscall",
+ "addu $sp, 32",
+ ".set at",
+ in(reg) a4.to_asm(),
+ in(reg) a5.to_asm(),
+ in(reg) a6.to_asm(),
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$t0*/) _,
+ lateout("$9" /*$t1*/) _,
+ lateout("$10" /*$t2*/) _,
+ lateout("$11" /*$t3*/) _,
+ lateout("$12" /*$t4*/) _,
+ lateout("$13" /*$t5*/) _,
+ lateout("$14" /*$t6*/) _,
+ lateout("$15" /*$t7*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
diff --git a/vendor/rustix/src/backend/linux_raw/arch/mips64.rs b/vendor/rustix/src/backend/linux_raw/arch/mips64.rs
new file mode 100644
index 0000000..244daf3
--- /dev/null
+++ b/vendor/rustix/src/backend/linux_raw/arch/mips64.rs
@@ -0,0 +1,466 @@
+//! mips64el Linux system calls.
+//!
+//! On mips64el, Linux indicates success or failure using `$a3` (`$7`) rather
+//! than by returning a negative error code as most other architectures do.
+//!
+//! Mips-family platforms have a special calling convention for `__NR_pipe`,
+//! however we use `__NR_pipe2` instead to avoid having to implement it.
+
+use crate::backend::reg::{
+ ArgReg, FromAsm, RetReg, SyscallNumber, ToAsm, A0, A1, A2, A3, A4, A5, R0,
+};
+use core::arch::asm;
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall0_readonly(nr: SyscallNumber) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_noreturn(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> ! {
+ asm!(
+ "syscall",
+ in("$2" /*$v0*/) nr.to_asm(),
+ in("$4" /*$a0*/) a0.to_asm(),
+ options(nostack, noreturn)
+ )
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ inlateout("$8" /*$a4*/) a4.to_asm() => _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ inlateout("$8" /*$a4*/) a4.to_asm() => _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ inlateout("$8" /*$a4*/) a4.to_asm() => _,
+ inlateout("$9" /*$a5*/) a5.to_asm() => _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ inlateout("$8" /*$a4*/) a4.to_asm() => _,
+ inlateout("$9" /*$a5*/) a5.to_asm() => _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
diff --git a/vendor/rustix/src/backend/linux_raw/arch/mips64r6.rs b/vendor/rustix/src/backend/linux_raw/arch/mips64r6.rs
new file mode 100644
index 0000000..8c06d9e
--- /dev/null
+++ b/vendor/rustix/src/backend/linux_raw/arch/mips64r6.rs
@@ -0,0 +1,470 @@
+//! mipsisa64r6el Linux system calls.
+//!
+//! On mipsisa64r6el, Linux indicates success or failure using `$a3` (`$7`)
+//! rather than by returning a negative error code as most other architectures
+//! do.
+//!
+//! Mips-family platforms have a special calling convention for `__NR_pipe`,
+//! however we use `__NR_pipe2` instead to avoid having to implement it.
+//!
+//! Note that MIPS R6 inline assembly currently doesn't differ from MIPS,
+//! because no explicit call of R6-only or R2-only instructions exist here.
+
+use crate::backend::reg::{
+ ArgReg, FromAsm, RetReg, SyscallNumber, ToAsm, A0, A1, A2, A3, A4, A5, R0,
+};
+use core::arch::asm;
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall0_readonly(nr: SyscallNumber) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_noreturn(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> ! {
+ asm!(
+ "syscall",
+ in("$2" /*$v0*/) nr.to_asm(),
+ in("$4" /*$a0*/) a0.to_asm(),
+ options(nostack, noreturn)
+ )
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ lateout("$7" /*$a3*/) err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ lateout("$8" /*$a4*/) _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ inlateout("$8" /*$a4*/) a4.to_asm() => _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ inlateout("$8" /*$a4*/) a4.to_asm() => _,
+ lateout("$9" /*$a5*/) _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ inlateout("$8" /*$a4*/) a4.to_asm() => _,
+ inlateout("$9" /*$a5*/) a5.to_asm() => _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let x0;
+ let err: usize;
+ asm!(
+ "syscall",
+ inlateout("$2" /*$v0*/) nr.to_asm() => x0,
+ in("$4" /*$a0*/) a0.to_asm(),
+ in("$5" /*$a1*/) a1.to_asm(),
+ in("$6" /*$a2*/) a2.to_asm(),
+ inlateout("$7" /*$a3*/) a3.to_asm() => err,
+ inlateout("$8" /*$a4*/) a4.to_asm() => _,
+ inlateout("$9" /*$a5*/) a5.to_asm() => _,
+ lateout("$10" /*$a6*/) _,
+ lateout("$11" /*$a7*/) _,
+ lateout("$12" /*$t0*/) _,
+ lateout("$13" /*$t1*/) _,
+ lateout("$14" /*$t2*/) _,
+ lateout("$15" /*$t3*/) _,
+ lateout("$24" /*$t8*/) _,
+ lateout("$25" /*$t9*/) _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(if err != 0 {
+ (x0 as usize).wrapping_neg() as *mut _
+ } else {
+ x0
+ })
+}
diff --git a/vendor/rustix/src/backend/linux_raw/arch/mod.rs b/vendor/rustix/src/backend/linux_raw/arch/mod.rs
new file mode 100644
index 0000000..ac9e25f
--- /dev/null
+++ b/vendor/rustix/src/backend/linux_raw/arch/mod.rs
@@ -0,0 +1,317 @@
+//! Architecture-specific syscall code.
+//!
+//! This module also has a `choose` submodule which chooses a scheme and is
+//! what most of the `rustix` syscalls use.
+//!
+//! Compilers should really have intrinsics for making system calls. They're
+//! much like regular calls, with custom calling conventions, and calling
+//! conventions are otherwise the compiler's job. But for now, use inline asm.
+//!
+//! The calling conventions for Linux syscalls are [documented here].
+//!
+//! [documented here]: https://man7.org/linux/man-pages/man2/syscall.2.html
+//!
+//! # Safety
+//!
+//! This contains the inline `asm` statements performing the syscall
+//! instructions.
+
+#![allow(unsafe_code)]
+#![cfg_attr(not(feature = "all-apis"), allow(unused_imports))]
+// We'll use as many arguments as syscalls need.
+#![allow(clippy::too_many_arguments)]
+
+// These functions always use the machine's syscall instruction, even when it
+// isn't the fastest option available.
+#[cfg_attr(target_arch = "aarch64", path = "aarch64.rs")]
+#[cfg_attr(all(target_arch = "arm", not(thumb_mode)), path = "arm.rs")]
+#[cfg_attr(all(target_arch = "arm", thumb_mode), path = "thumb.rs")]
+#[cfg_attr(target_arch = "mips", path = "mips.rs")]
+#[cfg_attr(target_arch = "mips32r6", path = "mips32r6.rs")]
+#[cfg_attr(target_arch = "mips64", path = "mips64.rs")]
+#[cfg_attr(target_arch = "mips64r6", path = "mips64r6.rs")]
+#[cfg_attr(target_arch = "powerpc64", path = "powerpc64.rs")]
+#[cfg_attr(target_arch = "riscv64", path = "riscv64.rs")]
+#[cfg_attr(target_arch = "x86", path = "x86.rs")]
+#[cfg_attr(target_arch = "x86_64", path = "x86_64.rs")]
+pub(in crate::backend) mod asm;
+
+// On most architectures, the architecture syscall instruction is fast, so use
+// it directly.
+#[cfg(any(
+ target_arch = "arm",
+ target_arch = "aarch64",
+ target_arch = "mips",
+ target_arch = "mips32r6",
+ target_arch = "mips64",
+ target_arch = "mips64r6",
+ target_arch = "powerpc64",
+ target_arch = "riscv64",
+ target_arch = "x86_64",
+))]
+pub(in crate::backend) use self::asm as choose;
+
+// On 32-bit x86, use vDSO wrappers for all syscalls. We could use the
+// architecture syscall instruction (`int 0x80`), but the vDSO kernel_vsyscall
+// mechanism is much faster.
+#[cfg(target_arch = "x86")]
+pub(in crate::backend) use super::vdso_wrappers::x86_via_vdso as choose;
+
+// This would be the code for always using `int 0x80` on 32-bit x86.
+//#[cfg(target_arch = "x86")]
+//pub(in crate::backend) use self::asm as choose;
+
+// Macros for invoking system calls.
+//
+// These factor out:
+// - Calling `nr` on the syscall number to convert it into `SyscallNumber`.
+// - Calling `.into()` on each of the arguments to convert them into `ArgReg`.
+// - Qualifying the `syscall*` and `__NR_*` identifiers.
+// - Counting the number of arguments.
+macro_rules! syscall {
+ ($nr:ident) => {
+ $crate::backend::arch::choose::syscall0($crate::backend::reg::nr(
+ linux_raw_sys::general::$nr,
+ ))
+ };
+
+ ($nr:ident, $a0:expr) => {
+ $crate::backend::arch::choose::syscall1(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr) => {
+ $crate::backend::arch::choose::syscall2(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr) => {
+ $crate::backend::arch::choose::syscall3(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr, $a3:expr) => {
+ $crate::backend::arch::choose::syscall4(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ $a3.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr, $a3:expr, $a4:expr) => {
+ $crate::backend::arch::choose::syscall5(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ $a3.into(),
+ $a4.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr, $a3:expr, $a4:expr, $a5:expr) => {
+ $crate::backend::arch::choose::syscall6(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ $a3.into(),
+ $a4.into(),
+ $a5.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr, $a3:expr, $a4:expr, $a5:expr, $a6:expr) => {
+ $crate::backend::arch::choose::syscall7(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ $a3.into(),
+ $a4.into(),
+ $a5.into(),
+ $a6.into(),
+ )
+ };
+}
+
+// Macro to invoke a syscall that always uses direct assembly, rather than the
+// vDSO. Useful when still finding the vDSO.
+#[allow(unused_macros)]
+macro_rules! syscall_always_asm {
+ ($nr:ident) => {
+ $crate::backend::arch::asm::syscall0($crate::backend::reg::nr(linux_raw_sys::general::$nr))
+ };
+
+ ($nr:ident, $a0:expr) => {
+ $crate::backend::arch::asm::syscall1(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr) => {
+ $crate::backend::arch::asm::syscall2(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr) => {
+ $crate::backend::arch::asm::syscall3(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr, $a3:expr) => {
+ $crate::backend::arch::asm::syscall4(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ $a3.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr, $a3:expr, $a4:expr) => {
+ $crate::backend::arch::asm::syscall5(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ $a3.into(),
+ $a4.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr, $a3:expr, $a4:expr, $a5:expr) => {
+ $crate::backend::arch::asm::syscall6(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ $a3.into(),
+ $a4.into(),
+ $a5.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr, $a3:expr, $a4:expr, $a5:expr, $a6:expr) => {
+ $crate::backend::arch::asm::syscall7(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ $a3.into(),
+ $a4.into(),
+ $a5.into(),
+ $a6.into(),
+ )
+ };
+}
+
+/// Like `syscall`, but adds the `readonly` attribute to the inline asm, which
+/// indicates that the syscall does not mutate any memory.
+macro_rules! syscall_readonly {
+ ($nr:ident) => {
+ $crate::backend::arch::choose::syscall0_readonly($crate::backend::reg::nr(
+ linux_raw_sys::general::$nr,
+ ))
+ };
+
+ ($nr:ident, $a0:expr) => {
+ $crate::backend::arch::choose::syscall1_readonly(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr) => {
+ $crate::backend::arch::choose::syscall2_readonly(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr) => {
+ $crate::backend::arch::choose::syscall3_readonly(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr, $a3:expr) => {
+ $crate::backend::arch::choose::syscall4_readonly(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ $a3.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr, $a3:expr, $a4:expr) => {
+ $crate::backend::arch::choose::syscall5_readonly(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ $a3.into(),
+ $a4.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr, $a3:expr, $a4:expr, $a5:expr) => {
+ $crate::backend::arch::choose::syscall6_readonly(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ $a3.into(),
+ $a4.into(),
+ $a5.into(),
+ )
+ };
+
+ ($nr:ident, $a0:expr, $a1:expr, $a2:expr, $a3:expr, $a4:expr, $a5:expr, $a6:expr) => {
+ $crate::backend::arch::choose::syscall7_readonly(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ $a1.into(),
+ $a2.into(),
+ $a3.into(),
+ $a4.into(),
+ $a5.into(),
+ $a6.into(),
+ )
+ };
+}
+
+/// Like `syscall`, but indicates that the syscall does not return.
+#[cfg(feature = "runtime")]
+macro_rules! syscall_noreturn {
+ ($nr:ident, $a0:expr) => {
+ $crate::backend::arch::choose::syscall1_noreturn(
+ $crate::backend::reg::nr(linux_raw_sys::general::$nr),
+ $a0.into(),
+ )
+ };
+}
diff --git a/vendor/rustix/src/backend/linux_raw/arch/powerpc64.rs b/vendor/rustix/src/backend/linux_raw/arch/powerpc64.rs
new file mode 100644
index 0000000..14866c2
--- /dev/null
+++ b/vendor/rustix/src/backend/linux_raw/arch/powerpc64.rs
@@ -0,0 +1,413 @@
+//! powerpc64le Linux system calls.
+//!
+//! On powerpc64le, Linux indicates success or failure using `cr0.SO` rather
+//! than by returning a negative error code as most other architectures do. In
+//! theory we could immediately translate this into a `Result`, and it'd save a
+//! few branches. And in theory we could have specialized sequences for use
+//! with syscalls that are known to never fail. However, those would require
+//! more extensive changes in rustix's platform-independent code. For now, we
+//! check the flag and negate the error value to make PowerPC64 look like other
+//! architectures.
+
+use crate::backend::reg::{
+ ArgReg, FromAsm, RetReg, SyscallNumber, ToAsm, A0, A1, A2, A3, A4, A5, R0,
+};
+use core::arch::asm;
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall0_readonly(nr: SyscallNumber<'_>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "sc",
+ "bns 0f",
+ "neg 3, 3",
+ "0:",
+ inlateout("r0") nr.to_asm() => _,
+ lateout("r3") r0,
+ lateout("r4") _,
+ lateout("r5") _,
+ lateout("r6") _,
+ lateout("r7") _,
+ lateout("r8") _,
+ lateout("r9") _,
+ lateout("r10") _,
+ lateout("r11") _,
+ lateout("r12") _,
+ lateout("cr0") _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "sc",
+ "bns 0f",
+ "neg 3, 3",
+ "0:",
+ inlateout("r0") nr.to_asm() => _,
+ inlateout("r3") a0.to_asm() => r0,
+ lateout("r4") _,
+ lateout("r5") _,
+ lateout("r6") _,
+ lateout("r7") _,
+ lateout("r8") _,
+ lateout("r9") _,
+ lateout("r10") _,
+ lateout("r11") _,
+ lateout("r12") _,
+ lateout("cr0") _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "sc",
+ "bns 0f",
+ "neg 3, 3",
+ "0:",
+ inlateout("r0") nr.to_asm() => _,
+ inlateout("r3") a0.to_asm() => r0,
+ lateout("r4") _,
+ lateout("r5") _,
+ lateout("r6") _,
+ lateout("r7") _,
+ lateout("r8") _,
+ lateout("r9") _,
+ lateout("r10") _,
+ lateout("r11") _,
+ lateout("r12") _,
+ lateout("cr0") _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_noreturn(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> ! {
+ asm!(
+ "sc",
+ in("r0") nr.to_asm(),
+ in("r3") a0.to_asm(),
+ options(nostack, noreturn)
+ )
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "sc",
+ "bns 0f",
+ "neg 3, 3",
+ "0:",
+ inlateout("r0") nr.to_asm() => _,
+ inlateout("r3") a0.to_asm() => r0,
+ inlateout("r4") a1.to_asm() => _,
+ lateout("r5") _,
+ lateout("r6") _,
+ lateout("r7") _,
+ lateout("r8") _,
+ lateout("r9") _,
+ lateout("r10") _,
+ lateout("r11") _,
+ lateout("r12") _,
+ lateout("cr0") _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "sc",
+ "bns 0f",
+ "neg 3, 3",
+ "0:",
+ inlateout("r0") nr.to_asm() => _,
+ inlateout("r3") a0.to_asm() => r0,
+ inlateout("r4") a1.to_asm() => _,
+ lateout("r5") _,
+ lateout("r6") _,
+ lateout("r7") _,
+ lateout("r8") _,
+ lateout("r9") _,
+ lateout("r10") _,
+ lateout("r11") _,
+ lateout("r12") _,
+ lateout("cr0") _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "sc",
+ "bns 0f",
+ "neg 3, 3",
+ "0:",
+ inlateout("r0") nr.to_asm() => _,
+ inlateout("r3") a0.to_asm() => r0,
+ inlateout("r4") a1.to_asm() => _,
+ inlateout("r5") a2.to_asm() => _,
+ lateout("r6") _,
+ lateout("r7") _,
+ lateout("r8") _,
+ lateout("r9") _,
+ lateout("r10") _,
+ lateout("r11") _,
+ lateout("r12") _,
+ lateout("cr0") _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "sc",
+ "bns 0f",
+ "neg 3, 3",
+ "0:",
+ inlateout("r0") nr.to_asm() => _,
+ inlateout("r3") a0.to_asm() => r0,
+ inlateout("r4") a1.to_asm() => _,
+ inlateout("r5") a2.to_asm() => _,
+ lateout("r6") _,
+ lateout("r7") _,
+ lateout("r8") _,
+ lateout("r9") _,
+ lateout("r10") _,
+ lateout("r11") _,
+ lateout("r12") _,
+ lateout("cr0") _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "sc",
+ "bns 0f",
+ "neg 3, 3",
+ "0:",
+ inlateout("r0") nr.to_asm() => _,
+ inlateout("r3") a0.to_asm() => r0,
+ inlateout("r4") a1.to_asm() => _,
+ inlateout("r5") a2.to_asm() => _,
+ inlateout("r6") a3.to_asm() => _,
+ lateout("r7") _,
+ lateout("r8") _,
+ lateout("r9") _,
+ lateout("r10") _,
+ lateout("r11") _,
+ lateout("r12") _,
+ lateout("cr0") _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "sc",
+ "bns 0f",
+ "neg 3, 3",
+ "0:",
+ inlateout("r0") nr.to_asm() => _,
+ inlateout("r3") a0.to_asm() => r0,
+ inlateout("r4") a1.to_asm() => _,
+ inlateout("r5") a2.to_asm() => _,
+ inlateout("r6") a3.to_asm() => _,
+ lateout("r7") _,
+ lateout("r8") _,
+ lateout("r9") _,
+ lateout("r10") _,
+ lateout("r11") _,
+ lateout("r12") _,
+ lateout("cr0") _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "sc",
+ "bns 0f",
+ "neg 3, 3",
+ "0:",
+ inlateout("r0") nr.to_asm() => _,
+ inlateout("r3") a0.to_asm() => r0,
+ inlateout("r4") a1.to_asm() => _,
+ inlateout("r5") a2.to_asm() => _,
+ inlateout("r6") a3.to_asm() => _,
+ inlateout("r7") a4.to_asm() => _,
+ lateout("r8") _,
+ lateout("r9") _,
+ lateout("r10") _,
+ lateout("r11") _,
+ lateout("r12") _,
+ lateout("cr0") _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "sc",
+ "bns 0f",
+ "neg 3, 3",
+ "0:",
+ inlateout("r0") nr.to_asm() => _,
+ inlateout("r3") a0.to_asm() => r0,
+ inlateout("r4") a1.to_asm() => _,
+ inlateout("r5") a2.to_asm() => _,
+ inlateout("r6") a3.to_asm() => _,
+ inlateout("r7") a4.to_asm() => _,
+ lateout("r8") _,
+ lateout("r9") _,
+ lateout("r10") _,
+ lateout("r11") _,
+ lateout("r12") _,
+ lateout("cr0") _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "sc",
+ "bns 0f",
+ "neg 3, 3",
+ "0:",
+ inlateout("r0") nr.to_asm() => _,
+ inlateout("r3") a0.to_asm() => r0,
+ inlateout("r4") a1.to_asm() => _,
+ inlateout("r5") a2.to_asm() => _,
+ inlateout("r6") a3.to_asm() => _,
+ inlateout("r7") a4.to_asm() => _,
+ inlateout("r8") a5.to_asm() => _,
+ lateout("r9") _,
+ lateout("r10") _,
+ lateout("r11") _,
+ lateout("r12") _,
+ lateout("cr0") _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "sc",
+ "bns 0f",
+ "neg 3, 3",
+ "0:",
+ inlateout("r0") nr.to_asm() => _,
+ inlateout("r3") a0.to_asm() => r0,
+ inlateout("r4") a1.to_asm() => _,
+ inlateout("r5") a2.to_asm() => _,
+ inlateout("r6") a3.to_asm() => _,
+ inlateout("r7") a4.to_asm() => _,
+ inlateout("r8") a5.to_asm() => _,
+ lateout("r9") _,
+ lateout("r10") _,
+ lateout("r11") _,
+ lateout("r12") _,
+ lateout("cr0") _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
diff --git a/vendor/rustix/src/backend/linux_raw/arch/riscv64.rs b/vendor/rustix/src/backend/linux_raw/arch/riscv64.rs
new file mode 100644
index 0000000..7b8533d
--- /dev/null
+++ b/vendor/rustix/src/backend/linux_raw/arch/riscv64.rs
@@ -0,0 +1,265 @@
+//! riscv64 Linux system calls.
+
+use crate::backend::reg::{
+ ArgReg, FromAsm, RetReg, SyscallNumber, ToAsm, A0, A1, A2, A3, A4, A5, R0,
+};
+use core::arch::asm;
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall0_readonly(nr: SyscallNumber<'_>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "ecall",
+ in("a7") nr.to_asm(),
+ lateout("a0") r0,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "ecall",
+ in("a7") nr.to_asm(),
+ inlateout("a0") a0.to_asm() => r0,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "ecall",
+ in("a7") nr.to_asm(),
+ inlateout("a0") a0.to_asm() => r0,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_noreturn(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> ! {
+ asm!(
+ "ecall",
+ in("a7") nr.to_asm(),
+ in("a0") a0.to_asm(),
+ options(nostack, noreturn)
+ );
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "ecall",
+ in("a7") nr.to_asm(),
+ inlateout("a0") a0.to_asm() => r0,
+ in("a1") a1.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "ecall",
+ in("a7") nr.to_asm(),
+ inlateout("a0") a0.to_asm() => r0,
+ in("a1") a1.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "ecall",
+ in("a7") nr.to_asm(),
+ inlateout("a0") a0.to_asm() => r0,
+ in("a1") a1.to_asm(),
+ in("a2") a2.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "ecall",
+ in("a7") nr.to_asm(),
+ inlateout("a0") a0.to_asm() => r0,
+ in("a1") a1.to_asm(),
+ in("a2") a2.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "ecall",
+ in("a7") nr.to_asm(),
+ inlateout("a0") a0.to_asm() => r0,
+ in("a1") a1.to_asm(),
+ in("a2") a2.to_asm(),
+ in("a3") a3.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "ecall",
+ in("a7") nr.to_asm(),
+ inlateout("a0") a0.to_asm() => r0,
+ in("a1") a1.to_asm(),
+ in("a2") a2.to_asm(),
+ in("a3") a3.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "ecall",
+ in("a7") nr.to_asm(),
+ inlateout("a0") a0.to_asm() => r0,
+ in("a1") a1.to_asm(),
+ in("a2") a2.to_asm(),
+ in("a3") a3.to_asm(),
+ in("a4") a4.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "ecall",
+ in("a7") nr.to_asm(),
+ inlateout("a0") a0.to_asm() => r0,
+ in("a1") a1.to_asm(),
+ in("a2") a2.to_asm(),
+ in("a3") a3.to_asm(),
+ in("a4") a4.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "ecall",
+ in("a7") nr.to_asm(),
+ inlateout("a0") a0.to_asm() => r0,
+ in("a1") a1.to_asm(),
+ in("a2") a2.to_asm(),
+ in("a3") a3.to_asm(),
+ in("a4") a4.to_asm(),
+ in("a5") a5.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "ecall",
+ in("a7") nr.to_asm(),
+ inlateout("a0") a0.to_asm() => r0,
+ in("a1") a1.to_asm(),
+ in("a2") a2.to_asm(),
+ in("a3") a3.to_asm(),
+ in("a4") a4.to_asm(),
+ in("a5") a5.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
diff --git a/vendor/rustix/src/backend/linux_raw/arch/thumb.rs b/vendor/rustix/src/backend/linux_raw/arch/thumb.rs
new file mode 100644
index 0000000..73f9c1c
--- /dev/null
+++ b/vendor/rustix/src/backend/linux_raw/arch/thumb.rs
@@ -0,0 +1,322 @@
+//! arm Linux system calls, using thumb-mode.
+//!
+//! In thumb-mode, r7 is the frame pointer and is not permitted to be used in
+//! an inline asm operand, so we have to use a different register and copy it
+//! into r7 inside the inline asm.
+
+use crate::backend::reg::{
+ ArgReg, FromAsm, RetReg, SyscallNumber, ToAsm, A0, A1, A2, A3, A4, A5, R0,
+};
+use core::arch::asm;
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall0_readonly(nr: SyscallNumber<'_>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "mov {tmp}, r7",
+ "mov r7, {nr}",
+ "svc 0",
+ "mov r7, {tmp}",
+ nr = in(reg) nr.to_asm(),
+ tmp = out(reg) _,
+ lateout("r0") r0,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "mov {tmp}, r7",
+ "mov r7, {nr}",
+ "svc 0",
+ "mov r7, {tmp}",
+ nr = in(reg) nr.to_asm(),
+ tmp = out(reg) _,
+ inlateout("r0") a0.to_asm() => r0,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "mov {tmp}, r7",
+ "mov r7, {nr}",
+ "svc 0",
+ "mov r7, {tmp}",
+ nr = in(reg) nr.to_asm(),
+ tmp = out(reg) _,
+ inlateout("r0") a0.to_asm() => r0,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_noreturn(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> ! {
+ asm!(
+ "mov r7, {nr}",
+ "svc 0",
+ nr = in(reg) nr.to_asm(),
+ in("r0") a0.to_asm(),
+ options(nostack, noreturn)
+ )
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "mov {tmp}, r7",
+ "mov r7, {nr}",
+ "svc 0",
+ "mov r7, {tmp}",
+ nr = in(reg) nr.to_asm(),
+ tmp = out(reg) _,
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "mov {tmp}, r7",
+ "mov r7, {nr}",
+ "svc 0",
+ "mov r7, {tmp}",
+ nr = in(reg) nr.to_asm(),
+ tmp = out(reg) _,
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "mov {tmp}, r7",
+ "mov r7, {nr}",
+ "svc 0",
+ "mov r7, {tmp}",
+ nr = in(reg) nr.to_asm(),
+ tmp = out(reg) _,
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "mov {tmp}, r7",
+ "mov r7, {nr}",
+ "svc 0",
+ "mov r7, {tmp}",
+ nr = in(reg) nr.to_asm(),
+ tmp = out(reg) _,
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "mov {tmp}, r7",
+ "mov r7, {nr}",
+ "svc 0",
+ "mov r7, {tmp}",
+ nr = in(reg) nr.to_asm(),
+ tmp = out(reg) _,
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ in("r3") a3.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "mov {tmp}, r7",
+ "mov r7, {nr}",
+ "svc 0",
+ "mov r7, {tmp}",
+ nr = in(reg) nr.to_asm(),
+ tmp = out(reg) _,
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ in("r3") a3.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "mov {tmp}, r7",
+ "mov r7, {nr}",
+ "svc 0",
+ "mov r7, {tmp}",
+ nr = in(reg) nr.to_asm(),
+ tmp = out(reg) _,
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ in("r3") a3.to_asm(),
+ in("r4") a4.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "mov {tmp}, r7",
+ "mov r7, {nr}",
+ "svc 0",
+ "mov r7, {tmp}",
+ nr = in(reg) nr.to_asm(),
+ tmp = out(reg) _,
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ in("r3") a3.to_asm(),
+ in("r4") a4.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "mov {tmp}, r7",
+ "mov r7, {nr}",
+ "svc 0",
+ "mov r7, {tmp}",
+ nr = in(reg) nr.to_asm(),
+ tmp = out(reg) _,
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ in("r3") a3.to_asm(),
+ in("r4") a4.to_asm(),
+ in("r5") a5.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "mov {tmp}, r7",
+ "mov r7, {nr}",
+ "svc 0",
+ "mov r7, {tmp}",
+ nr = in(reg) nr.to_asm(),
+ tmp = out(reg) _,
+ inlateout("r0") a0.to_asm() => r0,
+ in("r1") a1.to_asm(),
+ in("r2") a2.to_asm(),
+ in("r3") a3.to_asm(),
+ in("r4") a4.to_asm(),
+ in("r5") a5.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
diff --git a/vendor/rustix/src/backend/linux_raw/arch/x86.rs b/vendor/rustix/src/backend/linux_raw/arch/x86.rs
new file mode 100644
index 0000000..e789181
--- /dev/null
+++ b/vendor/rustix/src/backend/linux_raw/arch/x86.rs
@@ -0,0 +1,489 @@
+//! 32-bit x86 Linux system calls.
+//!
+//! There are two forms; `indirect_*` which take a callee, which allow calling
+//! through the vDSO when possible, and plain forms, which use the `int 0x80`
+//! instruction.
+//!
+//! Most `rustix` syscalls use the vsyscall mechanism rather than going using
+//! `int 0x80` sequences, as vsyscall is much faster.
+//!
+//! Syscalls made with `int 0x80` preserve the flags register, while syscalls
+//! made using vsyscall do not.
+
+#![allow(dead_code)]
+
+use crate::backend::reg::{
+ ArgReg, FromAsm, RetReg, SyscallNumber, ToAsm, A0, A1, A2, A3, A4, A5, R0,
+};
+use crate::backend::vdso_wrappers::SyscallType;
+use core::arch::asm;
+
+#[inline]
+pub(in crate::backend) unsafe fn indirect_syscall0(
+ callee: SyscallType,
+ nr: SyscallNumber<'_>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "call {callee}",
+ callee = in(reg) callee,
+ inlateout("eax") nr.to_asm() => r0,
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn indirect_syscall1(
+ callee: SyscallType,
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "call {callee}",
+ callee = in(reg) callee,
+ inlateout("eax") nr.to_asm() => r0,
+ in("ebx") a0.to_asm(),
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn indirect_syscall1_noreturn(
+ callee: SyscallType,
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+) -> ! {
+ asm!(
+ "call {callee}",
+ callee = in(reg) callee,
+ in("eax") nr.to_asm(),
+ in("ebx") a0.to_asm(),
+ options(noreturn)
+ )
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn indirect_syscall2(
+ callee: SyscallType,
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "call {callee}",
+ callee = in(reg) callee,
+ inlateout("eax") nr.to_asm() => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn indirect_syscall3(
+ callee: SyscallType,
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "call {callee}",
+ callee = in(reg) callee,
+ inlateout("eax") nr.to_asm() => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ in("edx") a2.to_asm(),
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn indirect_syscall4(
+ callee: SyscallType,
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ // a3 should go in esi, but `asm!` won't let us use it as an operand.
+ // Temporarily swap it into place, and then swap it back afterward.
+ //
+ // We hard-code the callee operand to use edi instead of `in(reg)` because
+ // even though we can't name esi as an operand, the compiler can use esi to
+ // satisfy `in(reg)`.
+ asm!(
+ "xchg esi, {a3}",
+ "call edi",
+ "xchg esi, {a3}",
+ a3 = in(reg) a3.to_asm(),
+ in("edi") callee,
+ inlateout("eax") nr.to_asm() => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ in("edx") a2.to_asm(),
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn indirect_syscall5(
+ callee: SyscallType,
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ // Oof. a3 should go in esi, and `asm!` won't let us use that register as
+ // an operand. And we can't request stack slots. And there are no other
+ // registers free. Use eax as a temporary pointer to a slice, since it gets
+ // clobbered as the return value anyway.
+ asm!(
+ "push esi",
+ "push [eax + 0]",
+ "mov esi, [eax + 4]",
+ "mov eax, [eax + 8]",
+ "call [esp]",
+ "pop esi",
+ "pop esi",
+ inout("eax") &[callee as _, a3.to_asm(), nr.to_asm()] => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ in("edx") a2.to_asm(),
+ in("edi") a4.to_asm(),
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn indirect_syscall6(
+ callee: SyscallType,
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ // Oof again. a3 should go in esi, and a5 should go in ebp, and `asm!`
+ // won't let us use either of those registers as operands. And we can't
+ // request stack slots. And there are no other registers free. Use eax as a
+ // temporary pointer to a slice, since it gets clobbered as the return
+ // value anyway.
+ //
+ // This is another reason that syscalls should be compiler intrinsics
+ // rather than inline asm.
+ asm!(
+ "push ebp",
+ "push esi",
+ "push [eax + 0]",
+ "mov esi, [eax + 4]",
+ "mov ebp, [eax + 8]",
+ "mov eax, [eax + 12]",
+ "call [esp]",
+ "pop esi",
+ "pop esi",
+ "pop ebp",
+ inout("eax") &[callee as _, a3.to_asm(), a5.to_asm(), nr.to_asm()] => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ in("edx") a2.to_asm(),
+ in("edi") a4.to_asm(),
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall0_readonly(nr: SyscallNumber<'_>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "int $$0x80",
+ inlateout("eax") nr.to_asm() => r0,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "int $$0x80",
+ inlateout("eax") nr.to_asm() => r0,
+ in("ebx") a0.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "int $$0x80",
+ inlateout("eax") nr.to_asm() => r0,
+ in("ebx") a0.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_noreturn(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> ! {
+ asm!(
+ "int $$0x80",
+ in("eax") nr.to_asm(),
+ in("ebx") a0.to_asm(),
+ options(nostack, noreturn)
+ )
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "int $$0x80",
+ inlateout("eax") nr.to_asm() => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "int $$0x80",
+ inlateout("eax") nr.to_asm() => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "int $$0x80",
+ inlateout("eax") nr.to_asm() => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ in("edx") a2.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "int $$0x80",
+ inlateout("eax") nr.to_asm() => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ in("edx") a2.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ // a3 should go in esi, but `asm!` won't let us use it as an operand.
+ // Temporarily swap it into place, and then swap it back afterward.
+ asm!(
+ "xchg esi, {a3}",
+ "int $$0x80",
+ "xchg esi, {a3}",
+ a3 = in(reg) a3.to_asm(),
+ inlateout("eax") nr.to_asm() => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ in("edx") a2.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "xchg esi, {a3}",
+ "int $$0x80",
+ "xchg esi, {a3}",
+ a3 = in(reg) a3.to_asm(),
+ inlateout("eax") nr.to_asm() => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ in("edx") a2.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ // As in `syscall4`, use xchg to handle a3. a4 should go in edi, and we can
+ // use that register as an operand. Unlike in `indirect_syscall5`, we don't
+ // have a `callee` operand taking up a register, so we have enough
+ // registers and don't need to use a slice.
+ asm!(
+ "xchg esi, {a3}",
+ "int $$0x80",
+ "xchg esi, {a3}",
+ a3 = in(reg) a3.to_asm(),
+ inlateout("eax") nr.to_asm() => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ in("edx") a2.to_asm(),
+ in("edi") a4.to_asm(),
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ // See the comments in `syscall5`.
+ asm!(
+ "xchg esi, {a3}",
+ "int $$0x80",
+ "xchg esi, {a3}",
+ a3 = in(reg) a3.to_asm(),
+ inlateout("eax") nr.to_asm() => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ in("edx") a2.to_asm(),
+ in("edi") a4.to_asm(),
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ // See the comments in `indirect_syscall6`.
+ asm!(
+ "push ebp",
+ "push esi",
+ "mov esi, [eax + 0]",
+ "mov ebp, [eax + 4]",
+ "mov eax, [eax + 8]",
+ "int $$0x80",
+ "pop esi",
+ "pop ebp",
+ inout("eax") &[a3.to_asm(), a5.to_asm(), nr.to_asm()] => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ in("edx") a2.to_asm(),
+ in("edi") a4.to_asm(),
+ options(preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ // See the comments in `indirect_syscall6`.
+ asm!(
+ "push ebp",
+ "push esi",
+ "mov esi, [eax + 0]",
+ "mov ebp, [eax + 4]",
+ "mov eax, [eax + 8]",
+ "int $$0x80",
+ "pop esi",
+ "pop ebp",
+ inout("eax") &[a3.to_asm(), a5.to_asm(), nr.to_asm()] => r0,
+ in("ebx") a0.to_asm(),
+ in("ecx") a1.to_asm(),
+ in("edx") a2.to_asm(),
+ in("edi") a4.to_asm(),
+ options(preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
diff --git a/vendor/rustix/src/backend/linux_raw/arch/x86_64.rs b/vendor/rustix/src/backend/linux_raw/arch/x86_64.rs
new file mode 100644
index 0000000..62f35d9
--- /dev/null
+++ b/vendor/rustix/src/backend/linux_raw/arch/x86_64.rs
@@ -0,0 +1,293 @@
+//! x86-64 Linux system calls.
+
+use crate::backend::reg::{
+ ArgReg, FromAsm, RetReg, SyscallNumber, ToAsm, A0, A1, A2, A3, A4, A5, R0,
+};
+use core::arch::asm;
+
+#[cfg(target_pointer_width = "32")]
+compile_error!("x32 is not yet supported");
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall0_readonly(nr: SyscallNumber<'_>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "syscall",
+ inlateout("rax") nr.to_asm() => r0,
+ lateout("rcx") _,
+ lateout("r11") _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "syscall",
+ inlateout("rax") nr.to_asm() => r0,
+ in("rdi") a0.to_asm(),
+ lateout("rcx") _,
+ lateout("r11") _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "syscall",
+ inlateout("rax") nr.to_asm() => r0,
+ in("rdi") a0.to_asm(),
+ lateout("rcx") _,
+ lateout("r11") _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall1_noreturn(nr: SyscallNumber<'_>, a0: ArgReg<'_, A0>) -> ! {
+ asm!(
+ "syscall",
+ in("rax") nr.to_asm(),
+ in("rdi") a0.to_asm(),
+ options(nostack, noreturn)
+ )
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "syscall",
+ inlateout("rax") nr.to_asm() => r0,
+ in("rdi") a0.to_asm(),
+ in("rsi") a1.to_asm(),
+ lateout("rcx") _,
+ lateout("r11") _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall2_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "syscall",
+ inlateout("rax") nr.to_asm() => r0,
+ in("rdi") a0.to_asm(),
+ in("rsi") a1.to_asm(),
+ lateout("rcx") _,
+ lateout("r11") _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "syscall",
+ inlateout("rax") nr.to_asm() => r0,
+ in("rdi") a0.to_asm(),
+ in("rsi") a1.to_asm(),
+ in("rdx") a2.to_asm(),
+ lateout("rcx") _,
+ lateout("r11") _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall3_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "syscall",
+ inlateout("rax") nr.to_asm() => r0,
+ in("rdi") a0.to_asm(),
+ in("rsi") a1.to_asm(),
+ in("rdx") a2.to_asm(),
+ lateout("rcx") _,
+ lateout("r11") _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "syscall",
+ inlateout("rax") nr.to_asm() => r0,
+ in("rdi") a0.to_asm(),
+ in("rsi") a1.to_asm(),
+ in("rdx") a2.to_asm(),
+ in("r10") a3.to_asm(),
+ lateout("rcx") _,
+ lateout("r11") _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall4_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "syscall",
+ inlateout("rax") nr.to_asm() => r0,
+ in("rdi") a0.to_asm(),
+ in("rsi") a1.to_asm(),
+ in("rdx") a2.to_asm(),
+ in("r10") a3.to_asm(),
+ lateout("rcx") _,
+ lateout("r11") _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "syscall",
+ inlateout("rax") nr.to_asm() => r0,
+ in("rdi") a0.to_asm(),
+ in("rsi") a1.to_asm(),
+ in("rdx") a2.to_asm(),
+ in("r10") a3.to_asm(),
+ in("r8") a4.to_asm(),
+ lateout("rcx") _,
+ lateout("r11") _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall5_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "syscall",
+ inlateout("rax") nr.to_asm() => r0,
+ in("rdi") a0.to_asm(),
+ in("rsi") a1.to_asm(),
+ in("rdx") a2.to_asm(),
+ in("r10") a3.to_asm(),
+ in("r8") a4.to_asm(),
+ lateout("rcx") _,
+ lateout("r11") _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "syscall",
+ inlateout("rax") nr.to_asm() => r0,
+ in("rdi") a0.to_asm(),
+ in("rsi") a1.to_asm(),
+ in("rdx") a2.to_asm(),
+ in("r10") a3.to_asm(),
+ in("r8") a4.to_asm(),
+ in("r9") a5.to_asm(),
+ lateout("rcx") _,
+ lateout("r11") _,
+ options(nostack, preserves_flags)
+ );
+ FromAsm::from_asm(r0)
+}
+
+#[inline]
+pub(in crate::backend) unsafe fn syscall6_readonly(
+ nr: SyscallNumber<'_>,
+ a0: ArgReg<'_, A0>,
+ a1: ArgReg<'_, A1>,
+ a2: ArgReg<'_, A2>,
+ a3: ArgReg<'_, A3>,
+ a4: ArgReg<'_, A4>,
+ a5: ArgReg<'_, A5>,
+) -> RetReg<R0> {
+ let r0;
+ asm!(
+ "syscall",
+ inlateout("rax") nr.to_asm() => r0,
+ in("rdi") a0.to_asm(),
+ in("rsi") a1.to_asm(),
+ in("rdx") a2.to_asm(),
+ in("r10") a3.to_asm(),
+ in("r8") a4.to_asm(),
+ in("r9") a5.to_asm(),
+ lateout("rcx") _,
+ lateout("r11") _,
+ options(nostack, preserves_flags, readonly)
+ );
+ FromAsm::from_asm(r0)
+}
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