blob: 9b614811bd3553572f52d283a333d942c4d0460c (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
|
adc10_sam3u.o:
adc12_sam3u.o:
adc_sam3snxa.o:
pio.o:
00000000 T PIO_Clear
00000000 T PIO_Configure
00000000 T PIO_DisableInterrupt
00000000 T PIO_Get
00000000 T PIO_GetOutputDataStatus
00000000 T PIO_PullUp
00000000 T PIO_Set
00000000 T PIO_SetDebounceFilter
00000000 T PIO_SetInput
00000000 T PIO_SetOutput
00000000 T PIO_SetPeripheral
pmc.o:
00000000 T pmc_clr_fast_startup_input
00000000 T pmc_disable_all_pck
00000000 T pmc_disable_all_periph_clk
00000000 T pmc_disable_interrupt
00000000 T pmc_disable_pck
00000000 T pmc_disable_periph_clk
00000000 T pmc_disable_pllack
00000000 T pmc_disable_udpck
00000000 T pmc_disable_upll_clock
00000000 T pmc_enable_all_pck
00000000 T pmc_enable_all_periph_clk
00000000 T pmc_enable_backupmode
00000000 T pmc_enable_interrupt
00000000 T pmc_enable_pck
00000000 T pmc_enable_periph_clk
00000000 T pmc_enable_pllack
00000000 T pmc_enable_sleepmode
00000000 T pmc_enable_udpck
00000000 T pmc_enable_upll_clock
00000000 T pmc_enable_waitmode
00000000 T pmc_get_interrupt_mask
00000000 T pmc_get_status
00000000 T pmc_get_writeprotect_status
00000000 T pmc_is_locked_pllack
00000000 T pmc_is_locked_upll
00000000 T pmc_is_pck_enabled
00000000 T pmc_is_periph_clk_enabled
00000000 T pmc_mck_set_prescaler
00000000 T pmc_mck_set_source
00000000 T pmc_osc_disable_fastrc
00000000 T pmc_osc_disable_xtal
00000000 T pmc_osc_enable_fastrc
00000000 T pmc_osc_is_ready_32kxtal
00000000 T pmc_osc_is_ready_mainck
00000000 T pmc_pck_set_prescaler
00000000 T pmc_pck_set_source
00000000 T pmc_set_fast_startup_input
00000000 T pmc_set_writeprotect
00000000 T pmc_switch_mainck_to_fastrc
00000000 T pmc_switch_mainck_to_xtal
00000000 T pmc_switch_mck_to_mainck
00000000 T pmc_switch_mck_to_pllack
00000000 T pmc_switch_mck_to_sclk
00000000 T pmc_switch_mck_to_upllck
00000000 T pmc_switch_pck_to_mainck
00000000 T pmc_switch_pck_to_pllack
00000000 T pmc_switch_pck_to_sclk
00000000 T pmc_switch_pck_to_upllck
00000000 T pmc_switch_sclk_to_32kxtal
00000000 T pmc_switch_udpck_to_pllack
00000000 T pmc_switch_udpck_to_upllck
pwmc.o:
00000000 t FindClockConfiguration
00000000 T PWMC_ConfigureChannel
00000000 T PWMC_ConfigureChannelExt
00000000 T PWMC_ConfigureClocks
00000000 T PWMC_ConfigureComparisonUnit
00000000 T PWMC_ConfigureEventLineMode
00000000 T PWMC_ConfigureSyncChannel
00000000 T PWMC_DisableChannel
00000000 T PWMC_DisableChannelIt
00000000 T PWMC_DisableIt
00000000 T PWMC_DisableOverrideOutput
00000000 T PWMC_EnableChannel
00000000 T PWMC_EnableChannelIt
00000000 T PWMC_EnableFaultProtection
00000000 T PWMC_EnableIt
00000000 T PWMC_EnableOverrideOutput
00000000 T PWMC_FaultClear
00000000 T PWMC_SetDeadTime
00000000 T PWMC_SetDutyCycle
00000000 T PWMC_SetFaultMode
00000000 T PWMC_SetFaultProtectionValue
00000000 T PWMC_SetOverrideValue
00000000 T PWMC_SetPeriod
00000000 T PWMC_SetSyncChannelUpdatePeriod
00000000 T PWMC_SetSyncChannelUpdateUnlock
00000000 T PWMC_WriteBuffer
U __assert_func
00000000 r __func__.6793
00000000 r __func__.6804
00000000 r __func__.6819
00000000 r __func__.6830
00000000 r __func__.6841
00000000 r __func__.6848
00000000 r __func__.6932
00000000 r __func__.6938
rtc.o:
00000000 T RTC_ClearSCCR
00000000 T RTC_DisableIt
00000000 T RTC_EnableIt
00000000 T RTC_GetDate
00000000 T RTC_GetHourMode
00000000 T RTC_GetSR
00000000 T RTC_GetTime
00000000 T RTC_SetDate
00000000 T RTC_SetDateAlarm
00000000 T RTC_SetHourMode
00000000 T RTC_SetTime
00000000 T RTC_SetTimeAlarm
U __assert_func
00000000 r __func__.6790
00000000 r __func__.6799
00000000 r __func__.6804
rtt.o:
00000000 T RTT_EnableIT
00000000 T RTT_GetStatus
00000000 T RTT_GetTime
00000000 T RTT_SetAlarm
00000000 T RTT_SetPrescaler
U __assert_func
00000000 r __func__.6797
00000000 r __func__.6805
spi.o:
00000000 T SPI_Configure
00000000 T SPI_ConfigureNPCS
00000000 T SPI_Disable
00000000 T SPI_DisableIt
00000000 T SPI_Enable
00000000 T SPI_EnableIt
00000000 T SPI_GetStatus
00000000 T SPI_IsFinished
00000000 T SPI_Read
00000000 T SPI_Write
U pmc_enable_periph_clk
tc.o:
00000000 T TC_Configure
00000000 T TC_FindMckDivisor
00000000 T TC_GetStatus
00000000 T TC_ReadCV
00000000 T TC_SetRA
00000000 T TC_SetRB
00000000 T TC_SetRC
00000000 T TC_Start
00000000 T TC_Stop
U __assert_func
00000000 r __func__.6792
00000000 r __func__.6798
00000000 r __func__.6804
timetick.o:
00000000 T GetTickCount
00000000 T Sleep
00000000 T TimeTick_Configure
00000000 T TimeTick_Increment
00000000 T Wait
00000000 b _dwTickCount
twi.o:
00000000 T TWI_ByteReceived
00000000 T TWI_ByteSent
00000000 T TWI_ConfigureMaster
00000000 T TWI_ConfigureSlave
00000000 T TWI_Disable
00000000 T TWI_DisableIt
00000000 T TWI_EnableIt
00000000 T TWI_GetMaskedStatus
00000000 T TWI_GetStatus
00000000 T TWI_ReadByte
00000000 T TWI_SendSTOPCondition
00000000 T TWI_SetClock
00000000 T TWI_StartRead
00000000 T TWI_StartWrite
00000000 T TWI_Stop
00000000 T TWI_TransferComplete
00000000 T TWI_WriteByte
U __assert_func
00000000 r __func__.7151
00000000 r __func__.7157
00000000 r __func__.7172
00000000 r __func__.7176
00000000 r __func__.7184
00000000 r __func__.7191
00000000 r __func__.7195
00000000 r __func__.7200
00000000 r __func__.7208
00000000 r __func__.7222
00000000 r __func__.7227
00000000 r __func__.7231
00000000 r __func__.7236
00000000 r __func__.7240
usart.o:
00000000 T USART_Configure
00000000 T USART_DisableIt
00000000 T USART_EnableIt
00000000 T USART_GetChar
00000000 T USART_GetStatus
00000000 T USART_IsDataAvailable
00000000 T USART_IsRxReady
00000000 T USART_PutChar
00000000 T USART_Read
00000000 T USART_ReadBuffer
00000000 T USART_SetIrdaFilter
00000000 T USART_SetReceiverEnabled
00000000 T USART_SetTransmitterEnabled
00000000 T USART_Write
00000000 T USART_WriteBuffer
U __assert_func
00000000 r __func__.7068
wdt.o:
00000000 T WDT_Disable
00000000 T WDT_Enable
00000000 T WDT_GetPeriod
00000000 T WDT_GetStatus
00000000 T WDT_Restart
system_sam3xa.o:
00000000 D SystemCoreClock
00000000 T SystemCoreClockUpdate
00000000 T SystemInit
00000000 T system_init_flash
startup_sam3xa.o:
U ADC_Handler
U BusFault_Handler
U CAN0_Handler
U CAN1_Handler
U DACC_Handler
U DMAC_Handler
U DebugMon_Handler
U EFC0_Handler
U EFC1_Handler
U EMAC_Handler
U HSMCI_Handler
U HardFault_Handler
U MemManage_Handler
U NMI_Handler
U PIOA_Handler
U PIOB_Handler
U PIOC_Handler
U PIOD_Handler
U PMC_Handler
U PWM_Handler
U PendSV_Handler
U RSTC_Handler
U RTC_Handler
U RTT_Handler
00000000 T Reset_Handler
U SMC_Handler
U SPI0_Handler
U SSC_Handler
U SUPC_Handler
U SVC_Handler
U SysTick_Handler
U TC0_Handler
U TC1_Handler
U TC2_Handler
U TC3_Handler
U TC4_Handler
U TC5_Handler
U TC6_Handler
U TC7_Handler
U TC8_Handler
U TRNG_Handler
U TWI0_Handler
U TWI1_Handler
U UART_Handler
U UOTGHS_Handler
U USART0_Handler
U USART1_Handler
U USART2_Handler
U USART3_Handler
U UsageFault_Handler
U WDT_Handler
U _erelocate
U _estack
U _etext
U _ezero
U _sfixed
U _srelocate
U _szero
00000000 R exception_table
U main
adc.o:
00000000 T adc_configure_power_save
00000000 T adc_configure_sequence
00000000 T adc_configure_timing
00000000 T adc_configure_trigger
00000000 T adc_disable_all_channel
00000000 T adc_disable_anch
00000000 T adc_disable_channel
00000000 T adc_disable_channel_differential_input
00000000 T adc_disable_channel_input_offset
00000000 T adc_disable_interrupt
00000000 T adc_disable_tag
00000000 T adc_disable_ts
00000000 T adc_enable_all_channel
00000000 T adc_enable_anch
00000000 T adc_enable_channel
00000000 T adc_enable_channel_differential_input
00000000 T adc_enable_channel_input_offset
00000000 T adc_enable_interrupt
00000000 T adc_enable_tag
00000000 T adc_enable_ts
00000000 T adc_get_actual_adc_clock
00000000 T adc_get_channel_status
00000000 T adc_get_channel_value
00000000 T adc_get_comparison_mode
00000000 T adc_get_interrupt_mask
00000000 T adc_get_latest_value
00000000 T adc_get_overrun_status
00000000 T adc_get_pdc_base
00000000 T adc_get_status
00000000 T adc_get_tag
00000000 T adc_get_writeprotect_status
00000000 T adc_init
00000000 T adc_set_bias_current
00000000 T adc_set_channel_input_gain
00000000 T adc_set_comparison_channel
00000000 T adc_set_comparison_mode
00000000 T adc_set_comparison_window
00000000 T adc_set_resolution
00000000 T adc_set_writeprotect
00000000 T adc_start
00000000 T adc_start_sequencer
00000000 T adc_stop
00000000 T adc_stop_sequencer
udp.o:
udphs.o:
uotghs.o:
00000000 T UOTGHS_Handler
00000000 B gpf_isr
interrupt_sam_nvic.o:
00000000 D g_interrupt_enabled
uotghs_device.o:
00000000 T UDD_Attach
00000000 T UDD_ClearIN
00000000 T UDD_ClearOUT
00000000 T UDD_ClearSetupInt
00000000 T UDD_Detach
00000000 T UDD_FifoByteCount
00000000 T UDD_GetFrameNumber
00000000 T UDD_Init
00000000 T UDD_InitEP
00000000 T UDD_InitEndpoints
00000000 T UDD_ReadWriteAllowed
00000000 T UDD_ReceivedSetupInt
00000000 T UDD_Recv
00000000 T UDD_Recv8
00000000 T UDD_ReleaseRX
00000000 T UDD_ReleaseTX
00000000 T UDD_Send
00000000 T UDD_Send8
00000000 T UDD_SetAddress
00000000 T UDD_SetStack
00000000 T UDD_Stall
00000000 T UDD_WaitForINOrOUT
00000000 T UDD_WaitIN
00000000 T UDD_WaitOUT
U g_interrupt_enabled
U gpf_isr
U pmc_enable_periph_clk
U pmc_enable_udpck
U pmc_enable_upll_clock
U pmc_switch_udpck_to_upllck
00000000 b ul_recv_fifo_ptr
00000000 b ul_send_fifo_ptr
uotghs_host.o:
00000000 T UHD_BusReset
00000000 T UHD_GetVBUSState
00000000 t UHD_ISR
00000000 T UHD_Init
00000000 T UHD_Pipe0_Alloc
00000000 T UHD_Pipe_Alloc
00000000 T UHD_Pipe_Free
00000000 T UHD_Pipe_Is_Transfer_Complete
00000000 T UHD_Pipe_Read
00000000 T UHD_Pipe_Send
00000000 T UHD_Pipe_Write
00000000 T UHD_SetStack
U g_interrupt_enabled
U gpf_isr
U pmc_enable_periph_clk
U pmc_enable_udpck
U pmc_enable_upll_clock
U pmc_switch_udpck_to_upllck
00000000 b uhd_state
dacc.o:
00000000 T dacc_disable_channel
00000000 T dacc_disable_interrupt
00000000 T dacc_disable_trigger
00000000 T dacc_enable_channel
00000000 T dacc_enable_flexible_selection
00000000 T dacc_enable_interrupt
00000000 T dacc_get_analog_control
00000000 T dacc_get_channel_status
00000000 T dacc_get_interrupt_mask
00000000 T dacc_get_interrupt_status
00000000 T dacc_get_pdc_base
00000000 T dacc_get_writeprotect_status
00000000 T dacc_reset
00000000 T dacc_set_analog_control
00000000 T dacc_set_channel_selection
00000000 T dacc_set_power_save
00000000 T dacc_set_timing
00000000 T dacc_set_transfer_mode
00000000 T dacc_set_trigger
00000000 T dacc_set_writeprotect
00000000 T dacc_write_conversion_data
can.o:
00000000 R can_bit_time
00000000 T can_disable
00000000 T can_disable_autobaud_listen_mode
00000000 T can_disable_interrupt
00000000 T can_disable_low_power_mode
00000000 T can_disable_overload_frame
00000000 T can_disable_time_triggered_mode
00000000 T can_disable_timer_freeze
00000000 T can_disable_tx_repeat
00000000 T can_enable
00000000 T can_enable_autobaud_listen_mode
00000000 T can_enable_interrupt
00000000 T can_enable_low_power_mode
00000000 T can_enable_overload_frame
00000000 T can_enable_time_triggered_mode
00000000 T can_enable_timer_freeze
00000000 T can_enable_tx_repeat
00000000 T can_get_internal_timer_value
00000000 T can_get_interrupt_mask
00000000 T can_get_rx_error_cnt
00000000 T can_get_status
00000000 T can_get_timestamp_value
00000000 T can_get_tx_error_cnt
00000000 T can_global_send_abort_cmd
00000000 T can_global_send_transfer_cmd
00000000 T can_init
00000000 T can_mailbox_get_status
00000000 T can_mailbox_init
00000000 T can_mailbox_read
00000000 T can_mailbox_send_abort_cmd
00000000 T can_mailbox_send_transfer_cmd
00000000 T can_mailbox_set_timemark
00000000 T can_mailbox_tx_remote_frame
00000000 T can_mailbox_write
00000000 T can_reset_all_mailbox
00000000 T can_reset_internal_timer
00000000 T can_reset_mailbox_data
00000000 T can_set_rx_sync_stage
00000000 T can_set_timestamp_capture_point
U memset
efc.o:
00000000 T efc_disable_frdy_interrupt
00000000 T efc_enable_frdy_interrupt
00000000 T efc_get_flash_access_mode
00000000 T efc_get_result
00000000 T efc_get_status
00000000 T efc_get_wait_state
00000000 T efc_init
00000000 T efc_perform_command
0000006c T efc_perform_fcr
00000000 T efc_perform_read_sequence
00000000 T efc_set_flash_access_mode
00000000 T efc_set_wait_state
00000068 T efc_write_fmr
00000000 b iap_perform_command.7049
gpbr.o:
00000000 T gpbr_read
00000000 T gpbr_write
ssc.o:
U memset
00000000 T ssc_disable_interrupt
00000000 T ssc_disable_rx
00000000 T ssc_disable_tx
00000000 T ssc_disable_tx_frame_sync_data
00000000 T ssc_enable_interrupt
00000000 T ssc_enable_rx
00000000 T ssc_enable_tx
00000000 T ssc_enable_tx_frame_sync_data
00000000 T ssc_get_interrupt_mask
00000000 T ssc_get_rx_access
00000000 T ssc_get_rx_compare
00000000 T ssc_get_status
00000000 T ssc_get_tx_access
00000000 T ssc_get_writeprotect_status
00000000 T ssc_i2s_set_receiver
00000000 T ssc_i2s_set_transmitter
00000000 T ssc_is_rx_enabled
00000000 T ssc_is_rx_ready
00000000 T ssc_is_tx_empty
00000000 T ssc_is_tx_enabled
00000000 T ssc_is_tx_ready
00000000 T ssc_read
00000000 T ssc_read_sync_data
00000000 T ssc_reset
00000000 T ssc_set_clock_divider
00000000 T ssc_set_loop_mode
00000000 T ssc_set_normal_mode
00000000 T ssc_set_receiver
00000000 T ssc_set_rx_compare
00000000 T ssc_set_rx_stop_selection
00000000 T ssc_set_td_default_level
00000000 T ssc_set_transmitter
00000000 T ssc_set_writeprotect
00000000 T ssc_write
00000000 T ssc_write_sync_data
trng.o:
00000000 T trng_disable
00000000 T trng_disable_interrupt
00000000 T trng_enable
00000000 T trng_enable_interrupt
00000000 T trng_get_interrupt_mask
00000000 T trng_get_interrupt_status
00000000 T trng_read_output_data
rstc.o:
00000000 T rstc_disable_user_reset
00000000 T rstc_disable_user_reset_interrupt
00000000 T rstc_enable_user_reset
00000000 T rstc_enable_user_reset_interrupt
00000000 T rstc_get_reset_cause
00000000 T rstc_get_status
00000000 T rstc_reset_extern
00000000 T rstc_set_external_reset
00000000 T rstc_start_software_reset
emac.o:
00000000 t circ_inc
00000000 T emac_dev_get_tx_load
00000000 T emac_dev_init
00000000 T emac_dev_read
00000000 T emac_dev_reset
00000000 T emac_dev_set_rx_callback
00000000 T emac_dev_set_tx_wakeup_callback
00000000 T emac_dev_write
00000000 T emac_handler
00000000 T emac_phy_read
00000000 T emac_phy_write
00000000 t emac_reset_rx_mem
00000000 t emac_reset_tx_mem
00000000 b gs_rx_desc
00000000 b gs_tx_callback
00000000 b gs_tx_desc
00000000 b gs_uc_rx_buffer
00000000 b gs_uc_tx_buffer
U memcpy
|